Romanian Journal for Information Science and Technology (ROMJIST)

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ROMJIST is a publication of Romanian Academy,
Section for Information Science and Technology

Editor – in – Chief:
Academician Dan Dascalu

Secretariate (office):
Adriana Neagu
Adress for correspondence: romjist@romjist.ro

Editing of the printed version: Mihaela Marian (Publishing House of the Romanian Academy, Bucharest)

Sponsor: National Institute
for R & D in Microtechnology
(IMT Bucharest)

ROMJIST Volume 20, No. 3, 2017, pp. 186-197, Paper no. 559/2017
 

David MIHAITA, Gheorghe STEFAN
Hybrid Accelerator with MapReduce Architecture for Convolutional Neural Networks

ABSTRACT: The current hybrid architectures used to train and implement Convolutional Neural Networks (CNN) are based on Nvidia GPU or Intel MIC accelerators. They are marked by limitations due to their too general and {\em ad hoc} structure and architecture. We propose an accelerator with a Map-Reduce architecture. The FPGA version of our proposal is considered for accelerating the training process, while the ASIC versions, based on experiments done in the FPGA environment, are targeted for low-energy consumption mass product applications. The paper emphasizes a specific set of functions for the CNN used in Machine Learning (ML) applications, and presents the resulting structural and architectural requirements. The main stages used in a pipe of functions destined to ML are: padding, convolution, pooling and fully connected neural network. The actual applications use these functions in a big variety of configurations. Thus, it worths to define, for training and running a CNN, a programmable accelerator. The paper describes the organization and the architecture of a hybrid system based on Map-Reduce architecture. The energy consumption is estimated, by simulation, for the ASIC version. We conclude that the Map-Reduce approach provides an appropriate solution for accelerating various ML applications.

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